Pixel driving circuit, display panel and methods for driving the same

ABSTRACT

The present disclosure provides a pixel driving circuit, a display panel and methods for driving the same. The pixel driving circuit includes: at least two driving sub-circuits, each configured to generate driving current based on a compensated data signal; at least two light-emitting control sub-circuits coupled to the at least two driving sub-circuits respectively, each of the at least two light-emitting control sub-circuits is configured to output driving current generated by one of the at least two driving sub-circuit coupled thereto; a writing control sub-circuit electrically coupled to the at least two driving sub-circuits and a data writing sub-circuit; and the data writing sub-circuit configured to compensate for a data signal and write the compensated data signal into the at least two driving sub-circuits sequentially under control of the writing control sub-circuit.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application claims priority to the Chinese Patent Application No.201911189265.X filed on Nov. 28, 2019, which is incorporated herein byreference in its entirety.

TECHNICAL FIELD

The present disclosure relates to the field of display technology, andmore particularly, to a pixel driving circuit, a display panel, andmethods for driving the same.

BACKGROUND

Organic Light-emitting Diodes (OLEDs) have advantages such asself-emission, wide viewing angles, high contrast, low powerconsumption, and fast response speeds etc., and therefore have beenwidely used and developed.

When an OLED display apparatus is used, it needs to compensate forpixels during use to improve their display performance. However, since acompensation circuit has a complicated structure, it needs to occupy alarge layout space, thereby limiting the improvement of a resolution ofthe pixels of the OLED display apparatus.

SUMMARY

The present disclosure provides a pixel driving circuit, a displaypanel, and methods for driving the same.

According to an aspect of the present disclosure, there is provided apixel driving circuit, comprising:

at least two driving sub-circuits, each configured to generate drivingcurrent based on a compensated data signal;

at least two light-emitting control sub-circuits coupled to the at leasttwo driving sub-circuits respectively, each of the at least twolight-emitting control sub-circuits is configured to output drivingcurrent generated by one of the at least two driving sub-circuitscoupled thereto;

a writing control sub-circuit electrically coupled to the at least twodriving sub-circuits and a data writing sub-circuit; and

the data writing sub-circuit configured to compensate for a data signaland write the compensated data signal into the respective at least twodriving sub-circuits sequentially under control of the writing controlsub-circuit.

In some embodiments, the data writing sub-circuit comprises:

a first transistor having a gate electrically coupled to receive a firstreset signal, a first electrode electrically coupled to receive a firstinitialization signal, and a second electrode electrically coupled to agate of a second transistor and a first electrode of the secondtransistor;

the second transistor having a second electrode electrically coupled toa first electrode of a third transistor; and

the third transistor having a gate electrically coupled to receive ascanning signal, and a second electrode electrically coupled to receivethe data signal.

In some embodiments, the writing control sub-circuit comprises:

at least two switching sub-circuits electrically coupled to the at leasttwo driving sub-circuits respectively, each switching sub-circuit isconfigured to receive a writing control signal and write the compensateddata signal generated by the data writing sub-circuit into one of the atleast two driving sub-circuit coupled thereto under control of thewriting control signal.

In some embodiments, each of the at least two switching sub-circuitscomprises:

a fourth transistor having a gate electrically coupled to receive thewriting control signal, a first electrode electrically coupled to thedata writing sub-circuit to receive the compensated data signal, and asecond electrode electrically coupled to one of the at least two drivingsub-circuits.

In some embodiments, each of the at least two driving sub-circuitscomprises:

a fifth transistor having a gate electrically coupled to one of the atleast two switching sub-circuits, a first electrode electrically coupledto one of the at least two light-emitting control sub-circuits, and asecond electrode electrically coupled to receive a first voltage; and

a storage capacitor having a first terminal electrically coupled to thegate of the fifth transistor, and a second terminal electrically coupledto receive the first voltage.

In some embodiments, each of the at least two light-emitting controlsub-circuits comprises:

a sixth transistor having a gate electrically coupled to receive alight-emitting control signal, a first electrode electrically coupled tooutput the driving current, and a second electrode electrically coupledto the first electrode of the fifth transistor.

In some embodiments, each of the light-emitting control sub-circuitsfurther comprises:

a seventh transistor having a gate electrically coupled to receive asecond reset signal, a first electrode electrically coupled to receive asecond initialization signal, and a second electrode electricallycoupled to the first electrode of the sixth transistor.

In some embodiments, a difference between a threshold voltage of thesecond transistor and a threshold voltage of a fifth transistor in eachdriving sub-circuit which is used as a driving transistor is within apreset first threshold range.

In some embodiments, a difference between a temperature drift amount ofthe threshold voltage of the second transistor and a temperature driftamount of the threshold voltage of the fifth transistor in each drivingsub-circuit is within a preset second threshold range.

In some embodiments, an absolute value of the difference between thethreshold voltage of the second transistor and the threshold voltage ofthe fifth transistor is less than or equal to 0.01V.

In some embodiments, an absolute value of the difference between thetemperature drift amount of the threshold voltage of the secondtransistor and the temperature drift amount of the threshold voltage ofthe fifth transistor is equal to or less than 0.01V.

In some embodiments, the at least two driving sub-circuits comprise afirst driving sub-circuit and a second driving sub-circuit, wherein thefirst driving sub-circuit is configured to generate first drivingcurrent based on the compensated data signal, and the second drivingsub-circuit is configured to generate second driving current based onthe compensated data signal; and

the at least two light-emitting control sub-circuits comprise a firstlight-emitting control sub-circuit and a second light-emitting controlsub-circuit, wherein the first light-emitting control sub-circuit iscoupled to the first driving sub-circuit and is configured to output thefirst driving current generated by the first driving sub-circuit undercontrol of a first light-emitting control signal, and the secondlight-emitting control sub-circuit is coupled to the second drivingsub-circuit, and is configured to output the second driving currentgenerated by the second driving sub-circuit under control of a secondlight-emitting control signal.

In some embodiments, the writing control sub-circuit comprises:

a first switching sub-circuit electrically coupled between the firstdriving sub-circuit and the data writing sub-circuit, and configured toreceive a first writing control signal, and provide the compensated datasignal generated by the data writing sub-circuit to the first drivingsub-circuit under control of the first writing control signal; and

a second switching sub-circuit electrically coupled between the seconddriving sub-circuit and the data writing sub-circuit, and configured toreceive a second writing control signal, and provide the compensateddata signal generated by the data writing sub-circuit to the seconddriving sub-circuit under control of the second writing control signal.

In some embodiments, the data writing sub-circuit is configured tocompensate for a first data signal and write the compensated first datasignal into the first driving sub-circuit, and compensate for a seconddata signal and write the compensated second data signal into the seconddriving sub-circuit, under control of the writing control sub-circuit.

According to another aspect of the present disclosure, there is provideda display panel comprising a plurality of pixel units arranged in anarray, each pixel unit comprising:

the pixel driving circuit described above; and

at least two light-emitting elements electrically coupled in one-to-onecorrespondence with the at least two driving sub-circuits of the pixeldriving circuit.

In some embodiments, the array is an M×N array, wherein M and N are bothintegers greater than 1;

pixel driving circuits of an i^(th) row of pixel units are coupled toreceive an i^(th) scanning signal, wherein i is an integer, and 1

i

M; and pixel driving circuits of a j^(th) column of pixel units arecoupled to receive a j^(th) data signal, wherein j is an integer, and 1

j

N.

According to yet another aspect of the present disclosure, there isprovided a method for driving the pixel driving circuit described above,comprising:

during a first period, compensating for, by the data writingsub-circuit, a k^(th) data signal and writing the compensated k^(th)data signal into a k^(th) driving sub-circuit of the pixel drivingcircuit under control of the writing control sub-circuit;

during a second period, outputting, by a k^(th) light-emitting controlsub-circuit, k^(th) driving current generated by the k^(th) drivingsub-circuit;

during a third period, compensating for, by the data writingsub-circuit, a (k+1)^(th) data signal and writing the compensated(k+1)^(th) data signal into a (k+1)^(th) driving sub-circuit of thepixel driving circuit under control of the writing control sub-circuit;and

during a fourth period, outputting, by a (k+1)^(th) light-emittingcontrol sub-circuit, (k+1)^(th) driving current generated by the(k+1)^(th) driving sub-circuit,

wherein k is an integer, and 1

k

K−1, where K represents a number of driving sub-circuits of the pixeldriving circuit, and is an integer greater than 1.

According to still another aspect of the present disclosure, there isprovided a method for driving the display panel described above,comprising: for each pixel unit,

during a first period, writing, by a data writing sub-circuit of a pixeldriving circuit of the pixel unit, a compensated data signal for ak^(th) light-emitting element of the pixel unit into a k^(th) drivingsub-circuit of the pixel driving circuit;

during a second period, causing the k^(th) light-emitting element toemit light using the compensated data signal;

during a third period, writing, by the data writing sub-circuit of thepixel driving circuit, a compensated data signal for a (k+1)^(th)light-emitting element of the pixel unit into a (k+1)^(th) drivingsub-circuit of the pixel driving circuit; and

during a fourth period, causing the (k+1)^(th) light-emitting element toemit light using the compensated data signal,

wherein k is an integer and 1

k

K−1, where K represents a number of driving sub-circuits of the pixeldriving circuit in the pixel unit, and is an integer greater than 1.

BRIEF DESCRIPTION OF THE ACCOMPANYING DRAWINGS

The above and other purposes, features, and advantages of theembodiments of the present disclosure will be more obvious by describingthe embodiments of the present disclosure with reference to theaccompanying drawings. It should be illustrated that throughout theaccompanying drawings, the same elements are represented by the same orsimilar reference signs. In the accompanying drawings:

FIG. 1 schematically illustrates a block diagram of a pixel drivingcircuit according to an embodiment of the present disclosure;

FIG. 2 schematically illustrates an exemplary circuit structure of apixel driving circuit according to an embodiment of the presentdisclosure;

FIG. 3 schematically illustrates another exemplary circuit structure ofa pixel driving circuit according to an embodiment of the presentdisclosure;

FIG. 4 schematically illustrates still another exemplary circuitstructure of a pixel driving circuit according to an embodiment of thepresent disclosure;

FIG. 5 schematically illustrates a block diagram of a display panelaccording to an embodiment of the present disclosure;

FIG. 6 schematically illustrates a block diagram of a display apparatusaccording to an embodiment of the present disclosure;

FIG. 7 schematically illustrates a flowchart of a driving methodaccording to an embodiment of the present disclosure; and

FIGS. 8A and 8B schematically illustrate timing diagrams of a drivingmethod according to an embodiment of the present disclosure.

DETAILED DESCRIPTION

In order to make the purposes, technical solutions and advantages of theembodiments of the present disclosure more clear, the technicalsolutions in the embodiments of the present disclosure will be clearlyand completely described below in conjunction with the accompanyingdrawings in the embodiments of the present disclosure. Obviously, theembodiments described are a part of the embodiments of the presentdisclosure instead of all the embodiments. All other embodimentsobtained by those of ordinary skill in the art based on the describedembodiments of the present disclosure without contributing any creativework are within the protection scope of the present disclosure. In thefollowing description, some specific embodiments are for illustrativepurposes only and are not to be construed as limiting the presentdisclosure, but merely examples of the embodiments of the presentdisclosure. The conventional structure or construction will be omittedwhen it may cause confusion with the understanding of the presentdisclosure. It should be illustrated that shapes and dimensions ofcomponents in the figures do not reflect true sizes and proportions, butonly illustrate contents of the embodiments of the present disclosure.

Unless otherwise defined, technical terms or scientific terms used inthe embodiments of the present disclosure should be of ordinary meaningsto those skilled in the art. “First”, “second” and similar words used inthe embodiments of the present disclosure do not represent any order,quantity or importance, but are merely used to distinguish betweendifferent constituent parts.

Particularly, in the description of the embodiments of the presentdiscourse, unless a source and a drain of a transistor are specified, a“first electrode” refers to a source or a drain of a switch transistor,and a “second electrode” refers to the drain or the source of the switchtransistor, which will not be distinguished from each other.

Furthermore, in the description of the embodiments of the presentdisclosure, the term “connected to” or “connected with” may mean thattwo components are directly connected, or that two components areconnected via one or more other components. In addition, the twocomponents may be connected or coupled by wire or wirelessly.

The embodiments of the present disclosure provide a pixel drivingcircuit capable of compensating for a threshold voltage of alight-emitting element such as an OLED. The pixel driving circuit isconfigured to drive at least two light-emitting elements. A blockdiagram of the pixel driving circuit is shown in FIG. 1, and a structureof the pixel driving circuit according to the embodiment of the presentdisclosure will be described below with reference to FIG. 1.

As shown in FIG. 1, the pixel driving circuit 100 comprises at least twodriving sub-circuits 101 ₁, . . . , 101 _(K), wherein K is a naturalnumber greater than or equal to 2. Each of the driving sub-circuits iselectrically coupled to a light-emitting element. Each of the at leasttwo driving sub-circuits 101 ₁, . . . , 101 _(K) is configured togenerate current (driving current) which causes respective one of the atleast two light-emitting elements OLED₁, . . . , OLED_(K) to emit light.

In FIG. 1, in order to facilitate description of an electricalconnection between the pixel driving circuit 100 and the light-emittingelements, the light-emitting elements OLED₁, . . . , OLED_(K) are shownin dotted lines.

In addition, in FIG. 1, the light-emitting elements are shown in a formof OLEDs, and it may be understood by those skilled in the art that thelight-emitting elements may be other light-emitting elements for examplecurrent driving-type light-emitting elements, and the present disclosureis not limited thereto.

As shown in FIG. 1, the pixel driving circuit 100 may further compriseat least two light-emitting control sub-circuits 102 ₁, . . . , 102_(K), wherein K is a natural number greater than or equal to 2. Each ofthe light-emitting control sub-circuits is electrically coupled betweena driving sub-circuit and a light-emitting element.

Each of the at least two light-emitting control sub-circuits 102 ₁, . .. , 102 _(K) is configured to provide current generated by therespective of the driving sub-circuits 101 ₁, . . . , 101 _(K) to therespective of the light-emitting elements OLED₁, . . . , OLED_(K).

As shown in FIG. 1, the pixel driving circuit 100 may further comprise awriting control sub-circuit 103 and a data writing sub-circuit 104. Thewriting control sub-circuit 103 is electrically coupled to the drivingsub-circuits 101 ₁, . . . , 101 _(K) and the data writing sub-circuit104, and is used to control the data writing sub-circuit 104 to write acompensated data signal (for example, a signal which is obtained byadding a compensation signal to a data signal) into the drivingsub-circuits 101 ₁, . . . , 101 _(K) sequentially.

The data writing sub-circuit 104 may write the compensated data signalsfor the at least two light-emitting elements OLED₁, . . . , OLED_(K)respectively into the at least two driving sub-circuits 101 ₁, . . . ,101 _(K) sequentially under control of the writing control sub-circuit103.

In the pixel driving circuit according to the embodiment of the presentdisclosure, a threshold voltage of a pixel (for example, a drivingtransistor of a light-emitting element (for example, an OLED) of thepixel) may be compensated. With the development of OLED displaytechnology, the demands for driving circuits are also increasing. In amanufacturing process in the factory, due to problems such as devices,processes etc., driving circuits of pixels are inevitably uneven. Forexample, threshold voltages of driving transistors of different pixelshave distributivity. As another example, a temperature drift due tovariation of a threshold voltage of a driving transistor withtemperature also varies. These problems may affect the display effect.The display effect of the OLED display apparatus may be improved bycompensating for the threshold voltages of the driving transistors.

According to the embodiment shown in FIG. 1, in an actual operation, thedata signal is compensated before being written into each of the writingdriving sub-circuits 101 ₁, . . . , 101 _(K), which may compensate forthreshold voltages of the light-emitting elements OLED₁, . . . ,OLED_(K).

In the pixel driving circuit according to the embodiment of the presentdisclosure, one data writing sub-circuit (for example, the data writingsub-circuit 104) may be used to compensate for the threshold voltages ofthe at least two light-emitting elements. The data writing sub-circuitis provided and is shared between the at least two light-emittingelements, so that the compensated data signals for the light-emittingelements are written into the driving sub-circuits sequentially, whichsignificantly reduces sizes of the pixel driving circuits.

With the gradual miniaturization of the application of OLED displaytechnology and users' demands for a resolution of an OLED displayscreen, how to increase a screen ratio, reduce peripheral wiring, andincrease a resolution of pixels has become the current research anddevelopment direction. As shown in FIG. 1, in the embodiment of thepresent disclosure, the data writing sub-circuit 104 may be designedaccording to characteristics of driving transistors in the drivingsub-circuits 101 ₁, . . . , 101 _(K) which drive the at least twolight-emitting elements OLED₁, . . . , OLED_(K), so that the datawriting sub-circuit 104 may have a capability of data writing andcompensation for the at least two light-emitting elements. Since atleast two light-emitting elements may share one data writing andcompensation circuit structure, wiring may be reduced, thereby reducingsizes of respective pixel units which form a display panel. Therefore,the pixel driving circuit according to the embodiment of the presentdisclosure may increase a screen area ratio and significantly reduce asize of the pixel driving circuit.

The embodiments of the present disclosure will be further describedbelow in combination with specific examples.

FIG. 2 schematically illustrates an exemplary circuit structure of apixel driving circuit according to an embodiment of the presentdisclosure. In this example, description is made using an arrangementconfigured to drive two light-emitting elements OLED₁ and OLED₂, but thepresent disclosure is not limited thereto. In FIG. 2, the light-emittingelements OLED₁ and OLED₂ are shown in dotted lines.

As shown in FIG. 2, the pixel driving circuit 200 comprises a firstdriving sub-circuit 201 ₁ and a second driving sub-circuit 201 ₂, afirst light-emitting control sub-circuit 2021 and a secondlight-emitting control sub-circuit 2022, a writing control sub-circuit203, and a data writing sub-circuit 204. The first driving sub-circuit201 ₁ is electrically coupled to the first light-emitting controlsub-circuit 2021 and a part of the writing control sub-circuit 203, andis configured to provide a compensated data signal (for example, a firstcompensation signal and a first data signal) to the light-emittingelement OLED₁. The second driving sub-circuit 201 ₂ is electricallycoupled to the second light-emitting control sub-circuit 2022 and a partof the writing control sub-circuit 203, and is configured to provide acompensated data signal (for example, a second compensation signal and asecond data signal) to the light-emitting element OLED₂.

The light-emitting elements OLED₁ and OLED₂ may be light-emittingelements in adjacent columns. For example, the light-emitting elementOLED₁ is in an odd-numbered ((2n−1)^(th)) column of a matrix formed bythe light-emitting elements, and the light-emitting element OLED₂ is inan even-numbered ((2n)^(th)) column of the matrix formed by thelight-emitting elements, wherein k is a natural number. The above twostructures electrically coupled to the light-emitting elements OLED₁ andOLED₂ respectively are arranged substantially symmetrically with respectto the data writing sub-circuit 204, but the present disclosure is notlimited thereto.

The data writing sub-circuit 204 is shared by the above two structures,and therefore the pixel driving circuit 200 according to the embodimentof the present disclosure may have a simplified driving circuitstructure and save wiring of data lines. When 2N light-emitting elementsare included in each row of an array (for example, a matrix) formed bythe light-emitting elements on a display panel, only N data writingsub-circuits 204 and N data lines need to be arranged.

As shown in FIG. 2, the data writing sub-circuit 204 comprises a firsttransistor T1, a second transistor T2, and a third transistor T3.According to an example, the first transistor T1 has a gate electricallycoupled to receive a first reset signal REST1, a first electrodeelectrically coupled to receive a first initialization signal V_(init),and a second electrode electrically coupled to a gate and a firstelectrode (a drain) of the second transistor T2. The second transistorT2 has a second electrode (a source) electrically coupled to a firstelectrode of the third transistor T3. The third transistor T3 has a gateelectrically coupled to receive a scanning signal V_(scan), and a secondelectrode electrically coupled to receive a data signal V_(data).

The first transistor T1 may be turned on under control of the firstreset signal REST1 applied to the gate thereof, thereby applying thefirst initialization signal V_(init) to the gate and the first electrode(the drain) of the second transistor T2, wherein the firstinitialization signal V_(init) may enable the second transistor T2 to beturned on. The third transistor T3 may be turned on under control of thescanning signal V_(scan) applied to the gate thereof. In a case wherethe second transistor T2 and the third transistor T3 are both turned on,the compensated data signals may be written into the first drivingsub-circuit 201 ₁ and the second driving sub-circuit 201 ₂ respectivelyunder control of the writing control sub-circuit 203.

In FIG. 2, the first transistor T1, the second transistor T2, and thethird transistor T3 are all shown as P-type transistors, but the presentdisclosure is not limited thereto. In other examples, the firsttransistor T1, the second transistor T2, and the third transistor T3 mayalso be N-type transistors. Functions of the data writing sub-circuit204 described above may be achieved by appropriately adjusting aconnection relationship between the transistors and voltages of thefirst reset signal REST1, the first initialization signal V_(init), thedata signal V_(data), and the scanning signal V_(scan).

As shown in FIG. 2, the writing control sub-circuit 203 comprises atleast two switching sub-circuits, for example, a first switchingsub-circuit comprising a fourth transistor T4_1 and a second switchingsub-circuit comprising a fourth transistor T4_2. In FIG. 2, the firstswitching sub-circuit is electrically coupled to the first drivingsub-circuit 201 ₁ and the second switching sub-circuit is electricallycoupled to the second driving sub-circuit 201 ₂. The first switchingsub-circuit may receive a writing control signal SW_1 (a first writingcontrol signal) and provide the compensated data signal generated by thedata writing sub-circuit 204 to the first driving sub-circuit 201 ₁under control of the writing control signal SW_1. The second switchingsub-circuit may receive a writing control signal SW_2 (a second writingcontrol signal) and provide the compensated data signal generated by thedata writing sub-circuit 204 to the second driving sub-circuit 201 ₂under control of the writing control signal SW_2.

In FIG. 2, the fourth transistor T4_1 has a gate electrically coupled toreceive the writing control signal SW_1 (the first writing controlsignal), a first electrode electrically coupled to the gate and thefirst electrode of the second transistor T2, and a second electrodeelectrically coupled to the first driving sub-circuit 201 ₁. The fourthtransistor T4_2 has a gate electrically coupled to receive the writingcontrol signal SW_2 (the second writing control signal), a firstelectrode electrically coupled to the gate and the first electrode ofthe second transistor T2, and a second electrode electrically coupled tothe second driving sub-circuit 201 ₂.

As shown in FIG. 2, the fourth transistor T4_1 may be turned on undercontrol of the writing control signal SW_1, and the fourth transistorT4_2 may be turned on under control of the writing control signal SW_2,so as to turn on respective electrical connection paths from the datawriting sub-circuit 204 to the first driving sub-circuit 201 ₁ and thesecond driving sub-circuit 201 ₂ to write the compensated data signalsinto the first driving sub-circuit 201 ₁ and the second drivingsub-circuit 201 ₂ respectively.

Likewise, the fourth transistors T4_1 and T4_2 are shown as P-typetransistors, but the present disclosure is not limited thereto. In otherexamples, the fourth transistors T4_1 and T4_2 may also be N-typetransistors. In this case, voltages of the writing control signals SW_1and SW_2 may be changed accordingly to implement the functions of thewriting control sub-circuit 203.

As shown in FIG. 2, the first driving sub-circuit 201 ₁ may comprise adriving transistor (a fifth transistor) DTFT_1 and a storage capacitorC_1, and the second driving sub-circuit 201 ₂ may comprise a drivingtransistor (a fifth transistor) DTFT_2 and a storage capacitor C_2. Thetwo driving sub-circuits may have the same structure. The drivingtransistor DTFT_1 and the driving transistor DTFT_2 may havesubstantially the same threshold voltage and substantially the sametemperature drift amount of the threshold voltage. In some embodiments,the driving transistor DTFT_1 and the driving transistor DTFT_2 may bethe same.

By taking the first driving sub-circuit 201 ₁ as an example, the drivingtransistor DTFT_1 has a gate electrically coupled to the secondelectrode of the fourth transistor T4_1, a first electrode (drain)electrically coupled to the first light-emitting control sub-circuit2021, and a second electrode (source) electrically coupled to receive afirst voltage VDD. The storage capacitor C_1 has a first terminalelectrically coupled to the second electrode of the fourth transistorT4_1, and a second terminal electrically coupled to receive the firstvoltage VDD.

As shown in FIG. 2, the first driving sub-circuit 201 ₁ may store thecompensated data signal (obtained by, for example, adding the firstcompensation signal (voltage) to the first data signal (voltage)) whichis written through the writing control sub-circuit 203 and the datawriting sub-circuit 204 in the storage capacitor C_1. The drivingtransistor DTFT_1 may generate current (driving current) which causesthe light-emitting element OLED₁ to emit light under control of avoltage (the compensated data signal) applied to the gate thereof, asshown in the following formula:

I ₁ =K ₁·(V _(GS1) −V _(th1))²

wherein K1 represents a parameter related to a process and design of thedriving transistor DTFT_1, and may be regarded as a constant for aspecific transistor; V_(GS1) represents a voltage applied between thegate and the source of the driving transistor DTFT_1, andV_(GS1)=V_(G1)−V_(DD) if V_(G1) represents the voltage applied to thegate of the driving transistor DTFT_1 and V_(DD) represents a voltagevalue of the first voltage V_(DD); V_(th1) represents a thresholdvoltage of the driving transistor DTFT_1, and is a negative value for aP-type driving transistor DTFT_1, and I₁ is resulting current.

The second driving sub-circuit 201 ₂ may have the same structure as thatof the first driving sub-circuit 201 ₁. The driving transistor DTFT_2may generate current I₂=K₂·(V_(GS2)−V_(th2))² which causes thelight-emitting element OLED₂ to emit light under control of a voltageapplied to the gate thereof, wherein K₂ represents a parameter relatedto a process and design of the driving transistor DTFT_2, and may beregarded as a constant for a specific transistor; V_(GS2) represents avoltage applied between the gate and the source of the drivingtransistor DTFT_2, and V_(GS2)=V_(G2)−V_(DD) if V_(G2) represents thevoltage applied to the gate of the driving transistor DTFT_2; V_(th2)represents a threshold voltage of the driving transistor DTFT_2, and isa negative value for a P-type driving transistor DTFT_2.

Likewise, the driving transistors DTFT_1 and DTFT_2 are shown as P-typetransistors, but the present disclosure is not limited thereto. In otherexamples, the driving transistors DTFT_1 and DTFT_2 may also be N-typetransistors.

As shown in FIG. 2, the first light-emitting control sub-circuit 2021comprises a sixth transistor T6_1, the second light-emitting controlsub-circuit 2022 comprises a sixth transistor T6_2, and the twolight-emitting control sub-circuits have the same structure.

By taking the first light-emitting control sub-circuit 2021 as anexample, the sixth transistor T6_1 has a gate electrically coupled toreceive a light-emitting control signal EM_1 (a first light-emittingcontrol signal), a first electrode electrically coupled to the firstterminal of the light-emitting element OLED₁, and a second electrodeelectrically coupled to the drain of the driving transistor DTFT_1. Thesixth transistor T6_1 may be turned on under control of thelight-emitting control signal EM_1 applied to the gate thereof, so as toprovide the current generated by the first driving sub-circuit 201 ₁ tothe light-emitting element OLED₁.

A structure and a function of the second light-emitting controlsub-circuit 2022 are the same as those of the first light-emittingcontrol sub-circuit 2021, and will not be described in detail here.

Likewise, the sixth transistors T6_1 and T6_2 are shown as P-typetransistors, but the present disclosure is not limited thereto. In otherexamples, the sixth transistors T6_1 and T6_2 may also be N-typetransistors. In a case of N-type transistors, functions of the firstlight-emitting control sub-circuit 2021 and the second light-emittingcontrol sub-circuit 2022 are realized by changing voltages of thelight-emitting control signal EM_1 (the first light-emitting controlsignal) and the light-emitting control signal EM_2 (the secondlight-emitting control signal) accordingly.

Different types of transistors generally have different thresholdvoltages. In addition, since a threshold voltage of a transistor maychange with temperature, that is, a drift of the threshold voltageoccurs, even for the same transistor, when an application environmentchanges, non-uniform display may occur due to the drift of the thresholdvoltage.

In the embodiment of the present disclosure, the threshold voltages ofthe driving transistors DTFT_1 and DTFT_2 are compensated by providingthe common second transistor T2 in the data writing sub-circuit 204,wherein the second transistor T2 has substantially the same electricalcharacteristics as those of the driving transistors DTFT_1 and DTFT_2.

According to an embodiment, differences between a threshold voltage ofthe second transistor T2 and the threshold voltages of the drivingtransistors DTFT_1 and DTFT_2 may be within a preset first thresholdrange, so that the threshold voltage of the second transistor T2 may beconsidered as substantially equal to those of the driving transistorsDTFT_1 and DTFT_2. In addition, differences between a temperature driftamount of the threshold voltage of the second transistor T2 andtemperature drift amounts of the threshold voltages of the drivingtransistors DTFT_1 and DTFT_2 may also be within a preset secondthreshold range, so that the temperature drift amount of the thresholdvoltage of the second transistor T2 may be considered as substantiallyequal to those of the driving transistors DTFT_1 and DTFT_2.

For example, the threshold voltages of the second transistor T2 and thedriving transistors DTFT_1 and DTFT_2 are represented by V′_(th),V_(th1) and V_(th2) respectively. The compensation signals (obtained byadding the threshold voltage V′_(th) to voltages of the data signal)comprising the threshold voltage V′_(th) of T2 are written into the gateof the driving transistor DTFT_1 in the first driving sub-circuit 201 ₁and the gate of the driving transistor DTFT_2 in the second drivingsub-circuit 201 ₂ respectively through the writing control sub-circuit203 and the data writing sub-circuit 204. In this way, in a case wherethe threshold voltage of the second transistor T2 is substantially equalto the threshold voltages of the driving transistors DTFT_1 and DTFT_2,it may be considered that V′_(th)=V_(th1)=V_(th2), and the influence ofthe threshold voltages V_(th1) and V_(th2) of the driving transistorsDTFT_1 and DTFT_2 are eliminated from the formulaI₁=K₁·(V_(GS1)−V_(th1))² of current which is generated by the drivingtransistor DTFT_1 and the formula I₂=K₂·(V_(GS2)−V_(th2))² of currentwhich is generated by the driving transistor DTFT_2.

According to an embodiment, an absolute value of the difference betweenthe threshold voltage of the second transistor T2 and the thresholdvoltages of the driving transistors DTFT_1 and DTFT_2 may be less thanor equal to 0.01V. According to an embodiment, an absolute value of thedifference between the temperature drift amount of the threshold voltageof the second transistor T2 and the temperature drift amounts of thethreshold voltages of the driving transistors DTFT_1 and DTFT_2 may beless than or equal to 0.01V.

According to an embodiment, transistors having substantially the sameelectrical characteristics may be manufactured using the followingmethod. For example, in some embodiments, the second transistor T2 maybe arranged closer to the driving transistors DTFT_1 and DTFT_2, forexample, the driving transistors DTFT_1 and DTFT_2 are arranged inadjacent columns, and the second transistor T2 is arranged between thedriving transistor DTFT_1 and DTFT_2. In some embodiments, the secondtransistor T2 and the driving transistors DTFT_1 and DTFT_2 may beprocessed through processes such as environmental parameter testing andaging experiment debugging etc. In some embodiments, transistors havingsubstantially the same electrical characteristics may be obtained byimproving manufacturing processes of the second transistor T2 and thedriving transistors DTFT_1 and DTFT_2. However, the present disclosureis not limited to the above embodiments, and any method which may enablethe electrical characteristics of the second transistor T2 to besubstantially the same as those of the driving transistors DTFT_1 andDTFT_2 may be adopted. In addition, the second transistor T2 and thedriving transistors DTFT_1 and DTFT_2 according to the embodiment of thepresent disclosure have substantially the same electricalcharacteristics, but may have different sizes and shapes.

According to an embodiment of the present disclosure, the thresholdvoltages and the temperature shift amounts of the threshold voltages ofthe driving transistors DTFT_1 and DTFT_2 included in the first drivingsub-circuit 201 ₁ and the second driving sub-circuit 201 ₂ may becompensated by the common data writing sub-circuit 204 comprising thesecond transistor T2, which reduces the size of the circuit whileimproving the display effect, and provides the possibility for improvingthe display resolution.

FIG. 3 schematically illustrates another exemplary circuit structure ofa pixel driving circuit according to an embodiment of the presentdisclosure.

As shown in FIG. 3, the pixel driving circuit 300 comprises a firstdriving sub-circuit 301 ₁ and a second driving sub-circuit 301 ₂, afirst light-emitting control sub-circuit 302 ₁ and a secondlight-emitting control sub-circuit 302 ₂, a writing control sub-circuit303, and a data writing sub-circuit 304. In addition, the first drivingsub-circuit 301 ₁ and the second driving sub-circuit 301 ₂, the writingcontrol sub-circuit 303, and the data writing sub-circuit 304 may havethe same structures as those of the first driving sub-circuit 201 ₁ andthe second driving sub-circuit 201 ₂, the writing control sub-circuit203 and the data writing sub-circuit 204 of the pixel driving circuit200, and will not be described in detail here.

As shown in FIG. 3, the first light-emitting control sub-circuit 302 ₁of the pixel driving circuit 300 comprises a sixth transistor T6_1 and aseventh transistor T7_1, and the second light-emitting controlsub-circuit 302 ₂ of the pixel driving circuit 300 comprises a sixthtransistor T6_2 and a seventh transistor T7_2. The sixth transistorsT6_1 and T6_2 may be implemented with reference to the sixth transistorincluded in the first light-emitting control sub-circuit 2021 of thepixel driving circuit 200 shown in FIG. 2. The seventh transistor T7_1has a gate electrically coupled to receive a second reset signalREST2_1, a first electrode electrically coupled to receive a secondinitialization signal V′_(init), and a second electrode electricallycoupled to the first terminal of the light-emitting element OLED₁.

The seventh transistor T71 may be turned on under control of the secondreset signal REST2_1 applied to the gate thereof to apply the secondinitialization signal V′_(init) to the first terminal of thelight-emitting element OLED₁ to set the light-emitting element OLED₁ tobe in a predetermined state, which may effectively reduce afterimagesduring display.

The seventh transistor T72 may be coupled in a manner similar to that ofthe seventh transistor T7_1. In FIG. 3, the gate of the seventhtransistor T7_2 is shown as being electrically coupled to receive thesecond reset signal REST2_2. The second reset signals REST2_1 andREST2_2 represent second reset signals applied to the firstlight-emitting control sub-circuit 302 ₁ and the second light-emittingcontrol sub-circuit 302 ₂ respectively, and may have the same ordifferent timings.

According to the embodiment of the present disclosure, thelight-emitting elements OLED₁ and OLED₂ may be turned off faster byresetting the light-emitting elements OLED₁ and OLED₂, which reduces theafterimages during the display while compensating for the thresholdvoltages of the driving transistors DTFT_1 and DTFT_2 and thetemperature drift amounts of the threshold voltages, thereby furtherimproving the display effect.

FIG. 4 schematically illustrates still another exemplary circuitstructure of a pixel driving circuit according to an embodiment of thepresent disclosure. Compared with the pixel driving circuit 300 shown inFIG. 3, eighth transistors T8_1 and T8_2 are further added in the firstlight-emitting control sub-circuit 302 ₁ and the second light-emittingcontrol sub-circuit 302 ₂ respectively.

As shown in FIG. 4, the eighth transistor T8_1 has a gate electricallycoupled to receive another light-emitting control signal EM2_1, a firstelectrode electrically coupled to the source of the driving transistorDTFT_1, and a second electrode electrically coupled to receive the firstvoltage V_(DD). The eighth transistor T8_2 has a gate electricallycoupled to receive another light-emitting control signal EM2_2, a firstelectrode electrically coupled to the source of the driving transistorDTFT_2, and a second electrode electrically coupled to receive the firstvoltage V_(DD). The eighth transistors T8_1 and T8_2 may be turned offduring a non-light-emitting phase, so as to prevent the drivingtransistors DTFT_1 and DTFT_2 from providing driving current to thelight-emitting elements during the non-light-emitting phase, which mayfurther improve the display effect.

FIG. 5 schematically illustrates a block diagram of a display panelaccording to an embodiment of the present disclosure.

As shown in FIG. 5, the display panel 500 comprises a plurality of pixelunits (as shown by dashed blocks, only one pixel unit is labeled in FIG.5 for simplicity) arranged in an array. Each of the pixel unitscomprises a pixel driving circuit 502 and at least two light-emittingelements 501 (two light-emitting elements are shown in FIG. 5). The atleast two light-emitting elements 501 are electrically coupled inone-to-one correspondence with at least two driving sub-circuits of thepixel driving circuit. The pixel driving circuits 502 may be implementedby the pixel driving circuits in any of the above embodiments.

In FIG. 5, the pixel units are arranged in an M×N array, wherein M and Nare both integers greater than 1, and pixel driving circuits of ani^(th) row of pixel units are coupled to receive an i^(th) scanningsignal V_(scan)(i), wherein i is an integer, and 1

i

M, and pixel driving circuits of a j^(th) column of pixel units arecoupled to receive a j^(th) data signal V_(data)( ), wherein j is aninteger and 1

j

N.

In a case where the pixel driving circuit 502 has any of the structuresdescribed above with reference to FIGS. 2 to 4, in the pixel drivingcircuits of the i^(th) row of pixel units, each of first light-emittingcontrol sub-circuits 302 ₁ may be coupled to a first light-emittingcontrol signal EM_1(i) for the i^(th) row of pixel units, each of secondlight-emitting control sub-circuits 302 ₁ may be coupled to a secondlight-emitting control signal EM_2(i) for the i^(th) row of pixel units,each of first switching sub-circuits (for example, the gate of thefourth transistor T4_1) may be coupled to receive a first writingcontrol signal SW_1(i) for the i^(th) row of pixel units, and each ofsecond switching sub-circuits (for example, the gate of the fourthtransistor T4_2) may be coupled to receive a second writing controlsignal SW_2(i) for the i^(th) row of pixel units.

As shown in FIG. 5, the display panel 500 comprises a plurality ofscanning lines SL₁, SL₂, SL₃, . . . , SL_(M), a plurality of data linesDL₁, DL₂, . . . , DL_(N), a plurality of light-emitting elements 501,and a plurality of pixel driving circuits 502.

The plurality of light-emitting elements 501 are arranged in a matrixcomprising rows and columns. The plurality of scanning lines SL₁, SL₂,SL₃, . . . , SL_(M) are arranged in correspondence with respective rowsof light-emitting elements. The plurality of data lines DL₁, DL₂, . . ., DL_(N) intersect with the plurality of scanning lines SL₁, SL₂, SL₃, .. . , SL_(M), and a data line DL_(j) is arranged between a (2j−1)^(th)column of light-emitting elements 501 and a (2j)^(th) column oflight-emitting elements 501. The plurality of pixel driving circuits 502according to the above embodiments are arranged at respective positionswhere the plurality of scanning lines intersect the plurality of datalines, and data writing sub-circuits of the pixel driving circuits 502are electrically coupled to scanning lines and data lines correspondingto the intersection positions to receive scanning signals and datasignals respectively.

In the display panel according to the embodiment of the presentdisclosure, one data line is shared between two adjacent columns oflight-emitting elements, which may significantly reduce wiring of thedata lines while compensating for the threshold voltages of thetransistors, thereby reducing a scale of the circuit.

FIG. 6 schematically illustrates a block diagram of a display apparatusaccording to an embodiment of the present disclosure. As shown in FIG.6, the display apparatus 600 according to the embodiment of the presentdisclosure comprises the display panel 601 according to the embodimentof the present disclosure. The display apparatus 600 according to theembodiment of the present disclosure may be any product or componenthaving a display function, such as an electronic paper, a mobile phone,a tablet computer, a television, a display, a notebook computer, adigital photo frame, a navigator, etc.

FIG. 7 schematically illustrates a flowchart of a driving methodaccording to an embodiment of the present disclosure, and FIGS. 8A and8B schematically illustrate timing diagrams of the driving methodaccording to an embodiment of the present disclosure. The driving methodaccording to the embodiment of the present disclosure will be describedbelow with reference to FIGS. 7, 8A, and 8B based on the pixel drivingcircuit 200 of the embodiment shown in FIG. 2.

As shown in FIG. 7, the driving method 700 comprises the following stepsS710 to S740.

In step S710, during a first period, the data writing sub-circuit of thepixel driving circuit compensates for a k^(th) data signal and writesthe compensated k^(th) data signal (for example, a first compensationsignal and a first data signal) into a k^(th) driving sub-circuit (forexample, a first driving sub-circuit) of the pixel driving circuit undercontrol of the writing control sub-circuit, wherein k is an integer, and1

k

K−1, where K represents a number of driving sub-circuits of the pixeldriving circuit, and K is an integer greater than 1. The compensateddata signal provided to the k^(th) driving sub-circuit may be used todrive a k^(th) light-emitting element in a pixel unit where the pixeldriving circuit is located. For example, for a pixel unit located in ani^(th) row and a j^(th) column, if the pixel unit comprises twolight-emitting elements, a first one of the two light-emitting elementsis located in an i^(th) row and a (2j−1)^(th) column in an array formedby light-emitting elements on a display panel, and a second one of thetwo light-emitting elements is located in the i^(th) row and a (2j)^(th)column in the array, and vice versa.

In step S720, during a second period, a k^(th) light-emitting controlsub-circuit outputs k^(th) driving current generated by the k^(th)driving sub-circuit. For example, the k^(th) driving sub-circuit maygenerate driving current (the k^(th) driving current) for causing thek^(th) light-emitting element to emit light using the compensated k^(th)data signal (for example, the first compensation signal and the firstdata signal), and the k^(th) light-emitting control sub-circuit outputsthe k^(th) driving current to the k^(th) light-emitting element.

In step S730, during a third period, the data writing sub-circuit of thepixel driving circuit compensates for a (k+1)^(th) data signal andwrites the compensated (k+1)^(th) data signal (for example, a secondcompensation signal and a second data signal for a second light-emittingelement of the pixel unit) into a (k+1)^(th) driving sub-circuit (forexample, a second driving sub-circuit) of the pixel driving circuitunder control of the writing control sub-circuit.

In step S740, during a fourth period, a (k+1)^(th) light-emittingcontrol sub-circuit outputs (k+1)^(th) driving current generated by the(k+1)^(th) driving sub-circuit. For example, the second drivingsub-circuit generates driving current for causing the secondlight-emitting element to emit light using the second compensationsignal and the second data signal, and the second light-emitting controlsub-circuit outputs the second driving current to the secondlight-emitting element.

Although steps of the method have been described above in a specificorder, the embodiments of the present disclosure are not limitedthereto. For example, steps S720 and S740 may be performed at the sametime after step S730 is performed, that is, the compensated data signalsmay be written into the k^(th) driving sub-circuit and the (k+1)^(th)driving sub-circuit sequentially, and then the k^(th) driving signal andthe (k+1)^(th) driving signal are output at the same time to light upthe k^(th) light-emitting unit and the (k+1)^(th) light-emitting unit atthe same time.

The above steps will be described in detail below with reference to theexemplary structure of FIG. 2.

As shown in FIGS. 2 and 8A, the first period may comprise aninitialization period t1 and a data writing period t2. During theinitialization period t1, the first reset signal REST1 at a low leveland the writing control signal SW_1 at a low level are provided. Whenthe first reset signal REST1 is at a low level, the first transistor T1is turned on, and the first initialization signal V_(init) is applied tothe gate of the second transistor T2 to ensure that the secondtransistor T2 may be turned on. When the writing control signal SW_1 isat a low level, the fourth transistor T4_1 is turned on, so that anelectrical connection path between the data writing sub-circuit 204 andthe first driving sub-circuit 201 ₁ is turned on.

During the initialization period t1, the scanning signal V_(scan) is ata high level, and therefore the third transistor T3 is turned off. Thewriting control signal SW_2 is at a high level, and therefore the fourthtransistor T4_2 is turned off, and an electrical connection path betweenthe data writing sub-circuit 204 and the second driving sub-circuit 201₂ is turned off. The light-emitting control signal EM_1 is at a highlevel, so that the sixth transistor T6_1 is turned off, and thereby thelight-emitting element OLED₁ stops emitting light. The light-emittingcontrol signal EM_2 is at a low level, that is, in a process of writingdata into the light-emitting element OLED₁, the light-emitting elementOLED₂ may display normally. When data signals and compensation signalsare not written, OLED₁ and OLED₂ are generally in a light-emittingstate, that is, the light-emitting control signals EM_1 and EM_2 are ata low level. Therefore, before a data signal and a compensation signalare written, a light-emitting state of a light-emitting element intowhich the data is to be written may be disabled. As shown in FIG. 8A,during a period of time before the initialization period t1, thelight-emitting control signal EM_1 is set to a high level, so that thelight-emitting element OLED₁ stops emitting light.

Next, during the data writing period t2, the writing control signal SW_1is maintained at a low level, and therefore the fourth transistor T4_1is maintained to be turned on. At the same time, the second transistorT2 is maintained to be turned on under control of the firstinitialization signal V_(init). The scanning signal V_(scan) at a lowlevel and a valid first data signal V_(data1) are provided. When thescanning signal V_(scan) is at a low level, the third transistor T3 isturned on. In a case where both the second transistor T2 and the thirdtransistor T3 are turned on, the first data signal V_(data1) charges thesecond terminal (that is, the gate of the driving transistor DTFT_1) ofthe storage capacitor C_1 through the third transistor T3, the secondtransistor T2, and the fourth transistor T4_1. The charging process doesnot end until a gate voltage V_(G1) of the driving transistor DTFT_1 isequal to V_(data1)+V′_(th), wherein V′_(th) represents a thresholdvoltage of the second transistor T2. Thereby, both the first data signalV_(data1) and the first compensation signal V′_(th) (for example, acompensated data signal having a voltage of V_(data1)+V′_(th)) arewritten into the gate of the driving transistor DTFT_1.

During the data writing period t2, the first reset signal REST1 is at ahigh level, and therefore the first transistor T1 is turned off. Thelight-emitting control signal EM_1 and the writing control signal SW_2are maintained at a high level, the light-emitting control signal EM_2is maintained at a low level, and therefore states of the sixthtransistor T6_1, the fourth transistor T4_2, and the sixth transistorT6_2 are maintained to be unchanged.

Next, during a period t3 (that is, a second period), the scanning signalV_(scan) is set to a high level to stop writing data, and the writingcontrol signal SW_1 is set to a high level to turn off the electricalconnection path between the data writing sub-circuit 204 and the firstdriving sub-circuit 201 ₁ and the light-emitting control signal EM_1 ata low level is provided to cause the light-emitting element OLED₁ toemit light using the written first data signal V_(data1) and the writtenfirst compensation signal V′_(th). Current generated by the drivingtransistor DTFT_1 is I₁=K₁·(V_(GS1)−V_(th1))², whereinV_(GS1)=V_(G1)−V_(DD)=V_(data)1+V′_(th)−V_(DD), and V_(th1) is thethreshold voltage of DTFT_1, and is a negative value. Since V_(th1) maybe set to be equal to V′_(th), the current generated by the drivingtransistor DTFT_1 is I₁=K₁·(V_(data1)−V_(DD))². That is, the resultingcurrent has nothing to do with the threshold voltage of the drivingtransistor DTFT_1, and has nothing to do with the temperature drift ofthe threshold voltage of DTFT_1. Thereby, the electrical compensation iscompleted.

The third period may comprise an initialization period t4 and a datawriting period t5. During the third period, the light-emitting controlsignal EM_1 is at a low level, so that in a process of writing data intothe light-emitting element OLED₂, the light-emitting element OLED₁ maydisplay normally.

During the initialization period t4, the first reset signal REST1 at alow level and the writing control signal SW_2 at a low level areprovided. When the first reset signal REST1 is at a low level, the firsttransistor T1 is turned on, and the first initialization signal V_(init)is applied to the gate of the second transistor T2 to ensure that thesecond transistor T2 may be turned on. When the writing control signalSW_2 is at a low level, the fourth transistor T4_2 is turned on, so thatthe electrical connection path between the data writing sub-circuit 204and the second driving sub-circuit 201 ₂ is turned on.

During the initialization period t4, the scanning signal V_(scan) is ata high level, and therefore the third transistor T3 is turned off. Thewriting control signal SW_1 is at a high level, and therefore the fourthtransistor T4_1 is turned off, and the electrical connection pathbetween the data writing sub-circuit 204 and the first drivingsub-circuit 201 ₁ is turned off. The light-emitting control signal EM_2is at a high level, so that the light-emitting element OLED₂ stopsemitting light. When the data signals and the compensation signals arenot written, the light-emitting elements OLED₁ and OLED₂ are generallyin a light-emitting state, that is, the light-emitting control signalsEM_1 and EM_2 are at a low level. Therefore, before a data signal and acompensation signal are written, a light-emitting state of alight-emitting element into which the data is to be written may bedisabled. As shown in FIG. 8A, before the initialization period t4, thelight-emitting control signal EM_2 is set to a high level.

Next, during a data writing period t5, the writing control signal SW_2is maintained at a low level, and therefore the fourth transistor T4_2is maintained to be turned on. The second transistor T2 is maintained tobe turned on under control of the first initialization signal V_(init).The scanning signal V_(scan) at a low level and a valid second datasignal V_(data2) are provided. When the scanning signal V_(scan) is at alow level, the third transistor T3 is turned on. In a case where thesecond transistor T2 and the third transistor T3 are both turned on, thesecond data signal V_(data2) charges the second terminal (that is, thegate of the driving transistor DTFT_2) of the storage capacitor C_2through the third transistor T3, the second transistor T2, and thefourth transistor T4_2. The charging process does not end until a gatevoltage V_(G2) of the driving transistor DTFT_2 is equal toV_(data)2+V′_(th), wherein V′_(th) represents a threshold voltage of thesecond transistor T2. Thereby, both the second data signal V_(data2) andthe second compensation signal V′_(th) are written into the gate of thedriving transistor DTFT_2.

During the data writing period t5, the first reset signal REST1 is at alow level, and therefore the first transistor T1 is turned off. Thelight-emitting control signal EM_2 and the writing control signal SW_1are maintained at a high level, the light-emitting control signal EM_1is maintained at a low level, and therefore states of the sixthtransistor T6_2, the fourth transistor T4_1, and the sixth transistorT6_1 are maintained to be unchanged.

Next, during a period t6 (that is, a fourth period), the scanning signalV_(scan) is set to a high level to stop writing data, the writingcontrol signal SW_2 is set to a high level to turn off the electricalconnection path between the data writing sub-circuit 204 and the seconddriving sub-circuit 201 ₂, and the light-emitting control signal EM_2 ata low level is provided to cause the light-emitting element OLED₂ toemit light using the written second data signal V_(data2) and thewritten second compensation signal V′_(th). Current generated by thedriving transistor DTFT_2 is I₂=K₂·(V_(GS2)−V_(th2))², whereinV_(GS2)=V_(G2)−V_(DD)=V_(data)2+V′_(th)−V_(DD), and V_(th2) is athreshold voltage of DTFT_2, and is a negative value. Since V_(th2) maybe set to V′_(th), the current generated by the driving transistorDTFT_2 is 12=K₂·(V_(data2)−V_(DD))². That is, the resulting current hasnothing to do with the threshold voltage of the driving transistorDTFT_2, and has nothing to do with the temperature drift of thethreshold voltage of DTFT_2. Thereby, the electrical compensation iscompleted.

In some embodiments, the period t3 and the period t4 may be combined,that is, the data writing for the light-emitting element OLED₂ may beinitialized while the light-emitting element OLED₁ is caused to emitlight using the written first data signal V_(data1) and the writtenfirst compensation signal V′_(th), as shown in FIG. 8B. The electricalconnection path between the data writing sub-circuit 204 and the firstdriving sub-circuit 201 ₁ may be turned off by the writing controlsignal SW_1 before the data writing for the light-emitting element OLED₂is initialized, so as to prevent the first driving sub-circuit 201 ₁ andthe second driving sub-circuit 201 ₂ from being electrically coupled tothe data writing sub-circuit 204 at the same time. Specific operationsof the period t3 (t4) may be known with reference to FIG. 8B and theabove related description of the period t3 and the period t4, and willnot be described in detail here.

It should be illustrated that, in the above description, the technicalsolutions according to the embodiments of the present disclosure areshown by way of example only, but it does not mean that the embodimentsof the present disclosure are limited to the above steps and structures.Where possible, steps and structures may be adjusted and selected asneeded. Therefore, certain steps and units are not elements necessary toimplement the general inventive concept of the embodiments of thepresent disclosure.

The present disclosure has been described so far in connection with thepreferred embodiments. It should be understood that those skilled in theart may make various other changes, substitutions, and additions withoutdeparting from the spirit and scope of the embodiments of the presentdisclosure. Therefore, the scope of the embodiments of the presentdisclosure is not limited to the specific embodiments described above,but should be defined by the appended claims.

1. A pixel driving circuit, comprising: at least two drivingsub-circuits, each configured to generate driving current based on acompensated data signal; at least two light-emitting controlsub-circuits coupled to the at least two driving sub-circuitsrespectively, each of the at least two light-emitting controlsub-circuits is configured to output driving current generated by one ofthe at least two driving sub-circuits coupled thereto; a writing controlsub-circuit electrically coupled to the at least two drivingsub-circuits and a data writing sub-circuit; and the data writingsub-circuit configured to compensate for a data signal and write thecompensated data signal into the at least two driving sub-circuitssequentially under control of the writing control sub-circuit, whereinthe writing control sub-circuit comprises at least two switchingsub-circuits electrically coupled to the at least two drivingsub-circuits respectively, each switching sub-circuit is configured toreceive a writing control signal and write the compensated data signalgenerated by the data writing sub-circuit into one of the at least twodriving sub-circuit coupled thereto under control of the writing controlsignal, wherein each of the at least two driving sub-circuits comprises:a fifth transistor having a gate electrically coupled to one of the atleast two switching sub-circuits, a first electrode electrically coupledto one of the at least two light-emitting control sub-circuits, and asecond electrode electrically coupled to receive a first voltage; and astorage capacitor having a first terminal electrically coupled to thegate of the fifth transistor, and a second terminal electrically coupledto receive the first voltage, wherein each of the at least twolight-emitting control sub-circuits comprises: a sixth transistor havinga gate electrically coupled to receive a light-emitting control signal,a first electrode electrically coupled to output the driving current,and a second electrode electrically coupled to the first electrode ofthe fifth transistor; and a seventh transistor having a gateelectrically coupled to receive a second reset signal, a first electrodeelectrically coupled to receive a second initialization signal, and asecond electrode electrically coupled to the first electrode of thesixth transistor.
 2. The pixel driving circuit according to claim 1,wherein the data writing sub-circuit comprises: a first transistorhaving a gate electrically coupled to receive a first reset signal, afirst electrode electrically coupled to receive a first initializationsignal, and a second electrode electrically coupled to a gate of asecond transistor and a first electrode of the second transistor; thesecond transistor having a second electrode electrically coupled to afirst electrode of a third transistor; and the third transistor having agate electrically coupled to receive a scanning signal, and a secondelectrode electrically coupled to receive the data signal.
 3. (canceled)4. The pixel driving circuit according to claim 1, wherein each of theat least two switching sub-circuits comprises: a fourth transistorhaving a gate electrically coupled to receive the writing controlsignal, a first electrode electrically coupled to the data writingsub-circuit to receive the compensated data signal, and a secondelectrode electrically coupled to one of the at least two drivingsub-circuits.
 5. (canceled)
 6. (canceled)
 7. (canceled)
 8. The pixeldriving circuit according to claim 2, wherein a difference between athreshold voltage of the second transistor and a threshold voltage of afifth transistor in each driving sub-circuit which is used as a drivingtransistor is within a preset first threshold range.
 9. The pixeldriving circuit according to claim 8, wherein a difference between atemperature drift amount of the threshold voltage of the secondtransistor and a temperature drift amount of the threshold voltage ofthe fifth transistor in each driving sub-circuit is within a presetsecond threshold range.
 10. The pixel driving circuit according to claim8, wherein an absolute value of the difference between the thresholdvoltage of the second transistor and the threshold voltage of the fifthtransistor is less than or equal to 0.01V.
 11. The pixel driving circuitaccording to claim 9, wherein an absolute value of the differencebetween the temperature drift amount of the threshold voltage of thesecond transistor and the temperature drift amount of the thresholdvoltage of the fifth transistor is equal to or less than 0.01V.
 12. Thepixel driving circuit according to claim 1, wherein the at least twodriving sub-circuits comprise a first driving sub-circuit and a seconddriving sub-circuit, wherein the first driving sub-circuit is configuredto generate first driving current based on the compensated data signal,and the second driving sub-circuit is configured to generate seconddriving current based on the compensated data signal; and the at leasttwo light-emitting control sub-circuits comprise a first light-emittingcontrol sub-circuit and a second light-emitting control sub-circuit,wherein the first light-emitting control sub-circuit is coupled to thefirst driving sub-circuit and is configured to output the first drivingcurrent generated by the first driving sub-circuit under control of afirst light-emitting control signal, and the second light-emittingcontrol sub-circuit is coupled to the second driving sub-circuit, and isconfigured to output the second driving current generated by the seconddriving sub-circuit under control of a second light-emitting controlsignal.
 13. The pixel driving circuit according to claim 12, wherein thewriting control sub-circuit comprises: a first switching sub-circuitelectrically coupled between the first driving sub-circuit and the datawriting sub-circuit, and configured to receive a first writing controlsignal, and provide the compensated data signal generated by the datawriting sub-circuit to the first driving sub-circuit under control ofthe first writing control signal; and a second switching sub-circuitelectrically coupled between the second driving sub-circuit and the datawriting sub-circuit, and configured to receive a second writing controlsignal, and provide the compensated data signal generated by the datawriting sub-circuit to the second driving sub-circuit under control ofthe second writing control signal.
 14. The pixel driving circuitaccording to claim 12, wherein the data writing sub-circuit isconfigured to compensate for a first data signal and write thecompensated first data signal into the first driving sub-circuit, andcompensate for a second data signal and write the compensated seconddata signal into the second driving sub-circuit, under control of thewriting control sub-circuit.
 15. A display panel comprising a pluralityof pixel units arranged in an array, each pixel unit comprising: thepixel driving circuit according to claim 1; and at least twolight-emitting elements electrically coupled in one-to-onecorrespondence with the at least two driving sub-circuits of the pixeldriving circuit.
 16. The display panel according to claim 15, whereinthe array is an M×N array, wherein M and N are both integers greaterthan 1; pixel driving circuits of an i^(th) row of pixel units arecoupled to receive an i^(th) scanning signal, wherein i is an integer,and 1≤i≤M; and pixel driving circuits of a j^(th) column of pixel unitsare coupled to receive a j^(th) data signal, wherein j is an integer,and 1≤j≤SN.
 17. A method for driving the pixel driving circuit accordingto claim 1, comprising: during a first period, compensating for, by thedata writing sub-circuit, a k^(th) data signal and writing thecompensated k^(th) data signal into a k^(th) driving sub-circuit of thepixel driving circuit under control of the writing control sub-circuit;during a second period, outputting, by a k^(th) light-emitting controlsub-circuit, k^(th) driving current generated by the k^(th) drivingsub-circuit; during a third period, compensating for, by the datawriting sub-circuit, a (k+1)^(th) data signal and writing thecompensated (k+1)^(th) data signal into a (k+1)^(th) driving sub-circuitof the pixel driving circuit under control of the writing controlsub-circuit; and during a fourth period, outputting, by a (k+1)^(th)light-emitting control sub-circuit, (k+1)^(th) driving current generatedby the (k+1)^(th) driving sub-circuit, wherein k is an integer, and1≤k≤K−1, where K represents a number of driving sub-circuits of thepixel driving circuit, and is an integer greater than
 1. 18. A methodfor driving the display panel according to claim 15, comprising: foreach pixel unit, during a first period, writing, by a data writingsub-circuit of a pixel driving circuit of the pixel unit, a compensateddata signal for a k^(th) light-emitting element of the pixel unit into ak^(th) driving sub-circuit of the pixel driving circuit; during a secondperiod, causing the k^(th) light-emitting element to emit light usingthe compensated data signal; during a third period, writing, by the datawriting sub-circuit of the pixel driving circuit, a compensated datasignal for a (k+1)^(th) light-emitting element of the pixel unit into a(k+1)^(th) driving sub-circuit of the pixel driving circuit; and duringa fourth period, causing the (k+1)^(th) light-emitting element to emitlight using the compensated data signal, wherein k is an integer and1≤k≤K−1, where K represents a number of driving sub-circuits of thepixel driving circuit in the pixel unit, and is an integer greater than1.